PARAM
Formation | late 1980's |
---|---|
Type | Supercomputers |
Parent organization | Centre for Development of Advanced Computing |
PARAM is a series of Indian supercomputers designed and assembled by the Centre for Development of Advanced Computing (C-DAC) in Pune.[1][2] PARAM means "supreme" in the Sanskrit language, whilst also creating an acronym for "PARAllel Machine".[1] As of November 2022, the fastest machine in the series is the PARAM Siddhi-AI which ranks 63rd in world, with an Rpeak of 5.267 petaflops.[3]
History
[edit]C-DAC was created in November 1987, originally as the Centre for Development of Advanced Computing Technology (C-DACT).[4] This was in response to issues purchasing supercomputers from foreign sources.[5] The Indian Government decided to try and develop indigenous computing technology.[6]
PARAM 8000
[edit]The PARAM 8000 was the first machine in the series and was built from scratch.[2] A prototype was benchmarked at the "1990 Zurich Super-computing Show":[note 1] of the machines that ran at the show it came second only to one from the United States.[7]
A 64-node machine was delivered in August 1991.[2][1] Each node used Inmos T800/T805 transputers.[1] A 256-node machine had a theoretical performance of 1GFLOPS, however in practice had a sustained performance of 100-200MFLOPS.[1][2] PARAM 8000 was a distributed memory MIMD architecture with a reconfigurable interconnection network.[8]
The PARAM 8000 was noted to be 28 times more powerful than the Cray X-MP that the government originally requested, for the same $10 million cost quoted for it.[9]
Exports
[edit]The computer was a success and was exported to Germany, United Kingdom and Russia.[10] Apart from taking over the home market, PARAM attracted 14 other buyers with its relatively low price tag of $350,000.[11]
The computer was also exported to the ICAD Moscow in 1991 under Russian collaboration.[12][13][14][15]
PARAM 8600
[edit]PARAM 8600 was an improvement over PARAM 8000. In 1992 C-DAC realised its machines were underpowered and wished to integrate the newly released Intel i860 processor.[16] Each node was created with one i860 and four Inmos T800 transputers.[8][2][1] The same PARAS programming environment was used for both the PARAM 8000 and 8600; this meant that programs were portable.[2][1] Each 8600 cluster was noted to be as powerful as 4 PARAM 8000 clusters.[1]
PARAM 9000
[edit]The PARAM (param vashisht lega) 9000 was designed to be merge cluster processing and massively parallel processing computing workloads.[17] It was first demonstrated in 1994.[5] The design was changed to be modular so that newer processors could be easily accommodated.[8] Typically a system used 32–40 processors, however it could be scaled up to 200 CPUs using the clos network topology.[8] The PARAM 9000/SS was the SuperSPARC II processor variant,[18] the PARAM 9000/US used the UltraSPARC processor,[9] and the PARAM 9000/AA used the DEC Alpha.[19]
PARAM 10000
[edit]The PARAM 10000 was unveiled in 1998 as part of C-DAC's second mission.[5] PARAM 10000 used several independent nodes, each based on the Sun Enterprise 250 server; each such server contained two 400Mhz UltraSPARC II processors. The base configuration had three compute nodes and a server node. The peak speed of this base system was 6.4 GFLOPS.[20] A typical system would contain 160 CPUs and be capable of 100 GFLOPS[21] But, it was easily scalable to the TFLOP range. Exported to Russia and Singapore.[22]
Further computers
[edit]Further computers were made in the PARAM series as one-off supercomputers, rather than serial production machines. From the late 2010s many machines were created as part of the National Supercomputing Mission.
Supercomputer summary
[edit]Name | Release Year | Notes | Rmax | Rpeak | Location |
---|---|---|---|---|---|
PARAM 8000 | 1991 | Inmos T800 Transputers, Distributed Memory MIMD, 64 processors | Multiple | ||
PARAM 8600 | 1992 | Improved version of PARAM 8000. Intel i860, 256 processors. Each 8600 cluster was as powerful as 4 PARAM 8000 clusters.[23] | 5 GFLOPS | Multiple | |
PARAM 9900 | 1994 | Clos network. SuperSPARC II, UltraSPARC and DEC Alpha variants, 32 to 200 processors | Multiple | ||
PARAM 10000 | 1998 | Sun Enterprise 250, 400Mhz UltraSPARC UltraSPARC II processor, 160 processors | 6.4 GFLOPS | Motilal Nehru National Institute of Technology, Prayagraj | |
PARAM Padma | 2002[5] | 1TB storage, 248 IBM Power4 – 1 GHz,[5] IBM AIX 5.1L, PARAMNet. PARAM Padma was the first Indian machine ranked on a worldwide supercomputer list.[5] | 1024 GFLOPS | C-DAC Bengaluru | |
PARAM Yuva | 2008 | 4608 cores, Intel 73XX – 2.9 GHz, 25 to 200 TB,[24] PARAMnet 3. | 38.1 TFLOPS[25] | 54 TFLOPS[25] | |
PARAM Yuva II | 2013 | Created in three months at a cost of ₹160 million (US$2 million) - first Indian supercomputer to achieve more than 500 teraflops.[26][27][28] Intel is the original equipment manufacturer and NetWeb technologies is the system integrator. It is interconnected with Indian Institute of Technology and National Institute of Technology via National Knowledge Network.[29] | 360.8 TFLOPS[30][31] | 524 TFLOPS | C-DAC Pune |
PARAM Kanchenjunga[32] | 2016 | Cost ₹3 crore.[33] | 15 TFLOPS | National Institute of Technology, Sikkim | |
PARAM Ishan | 2016 | Storage 300TB based on Lustre.[23] | 250 TFLOPS[34] | IIT Guwahati | |
PARAM Bio-Embryo[35] | 100 TFLOPS | Centre for Development of Advanced Computing, Pune | |||
PARAM Bio-Inferno[35] | 147.5 TFLOPS | C-DAC Pune | |||
PARAM Shrestha[35] | 100 TFLOPS | C-DAC Pune | |||
PARAM Neel[36] | India's first HPC system that uses the Fujitsu A64fx- NSP1 CPU, an ARM processor with 48 cores and a speed of 1.8 GHz | 100 TFLOPS | C-DAC Pune | ||
PARAM Shivay[37][38] | 2019 | 192 CPU compute nodes, 20 High memory nodes, 11 GPU compute nodes. Cost ₹32.5 crore. | 0.43 PFLOPS | 0.84 PFLOPS | IIT (BHU) Varanasi |
PARAM Brahma[39][40] | 2019 | 1PB storage. Uses Direct Contact Liquid Cooling.[23] | 0.85 PFLOPS | 1.7 PFLOPS | Indian Institute of Science Education and Research, Pune |
PARAM Siddhi-AI[41] | 2020 | Nvidia DGX SuperPOD based networking architecture, HPC-AI engine software frame works and cloud platform from C-DAC | 4.6 PFLOPS | 5.267 PFLOPS | C-DAC Pune |
PARAM Sanganak[42] | 2020 | 1.67 PFLOPS | IIT Kanpur | ||
PARAM Yukti[36] | 1.8 PFLOPS | Jawaharlal Nehru Centre For Advanced Scientific Research, Bengaluru | |||
PARAM Utkarsh[43] | 2021 | Based on Intel Cascade Lake processor and Nvidia Tesla V100 GPU with 100 Gbps infiniband non-blocking interconnect | 838 TFLOPS | C-DAC Bengaluru | |
PARAM Smriti[44] | 2021 | 838 TFLOPS | National Agri-Food Biotechnology Institute, Mohali | ||
PARAM Seva[35] | 2021 | Based on heterogeneous and hybrid configuration of Intel Xeon Cascade Lake processors, and Nvidia Tesla V100. | 838 TFLOPS | IIT Hyderabad | |
PARAM Spoorthi[36] | 2021 | 100 TFLOPS | Society for Electronic Transactions and Security, Chennai | ||
PARAM Pravega[45][46] | 2022 | It runs on CentOS 7.x, has 4PB storage, Intel Xeon Cascade Lake processors and Nvidia Tesla V100.[23] | 3.3 PFLOPS | Indian Institute of Science, Bengaluru | |
PARAM Ganga[47] | 2022 | 1.67 PFLOPS | IIT Roorkee | ||
PARAM Shakti[48] | 2022 | 850 TFLOPS | 1.66 PFLOPS | IIT Kharagpur | |
PARAM Ananta[49] | 2022 | 838 TFLOPS | IIT Gandhinagar | ||
PARAM Himalaya[36] | 2022 | 838 TFLOPS | IIT Mandi | ||
PARAM Kamrupa[50] | 2022 | 107 CPU nodes, 10 GPU nodes, 9 high memory nodes, 740 CPU cores, 102400 CUDA cores. It runs on low and high microwave power with active and passive high energy source.[51][52][53][54] Liquid cooling.[55] | 838 TFLOPS | 1.5 PFLOPS | IIT Guwahati[56] |
PARAM Porul[57] | 2022 | 107 CPU nodes, 10 GPU nodes, 39 high memory nodes, 102400 CUDA cores.[58] | 838 TFLOPS | National Institute of Technology, Tiruchirappalli | |
PARAM Rudra[35] | 2021 | Based on Intel Xeon 2nd Generation Cascade Lake dual socket processors, Nvidia A100 GPU, 35TB memory, and 2PB storage.[59] Cost ₹130 crore.[60] | 138 TFLOPS | C-DAC Pune | |
2024 | 1 PFLOPS[61] | Giant Metrewave Radio Telescope, Pune[61] | |||
3 PFLOPS[61] | Inter-University Accelerator Centre, New Delhi | ||||
838 TFLOPS[61] | S. N. Bose National Centre for Basic Sciences, Kolkata |
PARAMNet
[edit]PARAMNet is a high speed high bandwidth low latency network developed for the PARAM series. The original PARAMNet used an 8 port cascadable non-blocking switch developed by C-DAC. Each port provided 400 Mb/s in both directions (thus 2x400 Mbit/s) as it was a full-duplex network. It was first used in PARAM 10000.[9]
PARAMNet II, introduced with PARAM Padma, is capable of 2.5 Gbit/s while working full-duplex. It supports interfaces like Virtual Interface Architecture and Active messages. It uses 8 or 16 port SAN switches.[62]
PARAMNet-3, used in PARAM Yuva and PARAM Yuva-II, is next generation high performance networking component for building supercomputing systems. PARAMNet-3 consists of tightly integrated hardware and software components. The hardware components consist of Network Interface Cards (NIC) based on CDAC's fourth generation communication co-processor "GEMINI", and modular 48-port Packet Routing Switch "ANVAY". The software component "KSHIPRA" is a lightweight protocol stack designed to exploit capabilities of hardware and to provide industry standard interfaces to the applications. Other application areas identified for deployment of PARAMNet-3 are storage and database applications.[63]
Operators
[edit]PARAM supercomputers are used by both public and private[24] operators for various purposes. As of 2008, 52 PARAMs have been deployed. Of these, 8 are located in Russia, Singapore, Germany and Canada. PARAMs have also been sold to Tanzania, Armenia, Saudi Arabia, Singapore, Ghana, Myanmar, Nepal, Kazakhstan, Uzbekistan, and Vietnam.[64]
See also
[edit]- EKA
- SAGA-220, a 220 TeraFLOP supercomputer built by ISRO
- Supercomputing in India
- Wipro Supernova
Notes
[edit]- ^ This is likely the CONPAR 90 - VAPP IV, Joint International Conference on Vector and Parallel Processing, which took place in Zurich, Switzerland, 10–13 September 1990. The statement is difficult to fully attest to other than the referenced article. The proceedings of the conference can be found at https://doi.org/10.1007/3-540-53065-7
References
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- ^ a b c d e f Kahaner, D.K. (1996). "Parallel computing in India". IEEE Parallel & Distributed Technology: Systems & Applications. 4 (3): 7–11. doi:10.1109/88.532134.
L.M. Patnaik developed a significant amount of the factual material for this report.
- ^ "TOP500 List - November 2023 | TOP500". www.top500.org. Retrieved 13 November 2023.
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- ^ a b c d e f Sinha, P. K.; Dixit, S. P.; Mohanram, N.; Purohit, S. C.; Arora, R. K.; Ramakrishnan, S. (2004). "Current state and future trends in high performance computing and communications (HPCC) research in India". Proceedings. 10th IEEE International Workshop on Future Trends of Distributed Computing Systems, 2004. FTDCS 2004. pp. 217–220. doi:10.1109/FTDCS.2004.1316619. ISBN 0-7695-2118-5. S2CID 47348115.
- ^ Beary, Habib (25 April 1999). "India unveils huge supercomputer". BBC News.
India began developing supercomputers in the late 1980s after being refused one by the US.
- ^ "God, Man And Machine". PARAM SUKHADIA India. 1 July 1998. Retrieved 15 September 2011.
- ^ a b c d Zelkowitz, Marvin V. (1997). Advances in Computers, Volume 44. Academic Press. p. 186. ISBN 9780080566764. Retrieved 15 September 2011.
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- ^ "Supercomputer being developed at Pune, Bangalore will be ready in 6 months". Center for Development of Advanced Computing (C-DAC). Retrieved 15 September 2011.
...giving India her first indigenous supercomputer in 1991 (PARAM 8000)
- ^ "Digital India Week".
- ^ "The Little Known Story of How India's First Indigenous Supercomputer Amazed the World in 1991". The Better India. 13 January 2017.
- ^ Bhatkar, V.P. (April 1994). "PARAM parallel supercomputer: Architecture, programming environment, and applications". Proceedings of 8th International Parallel Processing Symposium. pp. 388–389. doi:10.1109/IPPS.1994.288273. ISBN 0-8186-5602-6. S2CID 9917838.
- ^ Mohan, RN. "A Microkernel Based Operating System for PARAM 9000" (PDF). Retrieved 24 July 2020.
- ^ Van der Steen, Aad J.; Dongarra, Jack J (1995). Overview of recent supercomputers. National Computing Facilities Foundation (Netherlands).
- ^ Harkar, A.; Shaligram, A.D.; Ghaisas, S.V.; Sundararajan, V. (December 1996). "Monte Carlo device simulation on PARAM". Proceedings of 3rd International Conference on High Performance Computing (HiPC). pp. 33–35. doi:10.1109/HIPC.1996.565792. ISBN 0-8186-7557-8. S2CID 40870947.
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- ^ a b c d Nataraj, Poornima (11 March 2022). "Indian PARAM Supercomputers (Complete List)". AIM. Retrieved 3 October 2024.
- ^ a b "PARAM Yuva supercomputer now open to private sector". Indian Express. 26 February 2011. Retrieved 15 September 2011.
With an enhanced storage capacity of 200 TB from 25 TB, a large number of users can use it for data processing and storage at the same time.
- ^ a b "Top500: "PARAM Yuva" Cluster (Performance)". Retrieved 15 September 2011.
- ^ "C-DAC unveils India's fastest supercomputer". The Times of India. 9 February 2013. Archived from the original on 2 June 2013. Retrieved 9 February 2013.
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- ^ "PARAM Kanchenjunga inaugurated at NIT Sikkim". Retrieved 26 November 2018.
- ^ Misal, Disha (15 July 2019). "Top 8 Supercomputers Used By Indian Educational Institutes For Research". AIM. Retrieved 3 October 2024.
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- ^ "IIT Kharagpur". Inaugurated on 27 March 2022
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- ^ "President Droupadi Murmu inaugurates 'PARAM KAMRUPA' Supercomputer facility at IIT Guwahati". newsonair.gov.in. Retrieved 14 October 2022.
- ^ "President of India in Assam; Inaugurates supercomputer facility and laboratory for the design and development of high power microwave components at IIT Guwahati and medical college and hospital at Dhubri; also lays foundation stones for two zonal institutes of NIV". pib.gov.in. Retrieved 14 October 2022.
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- ^ "PARAMNet3". Retrieved 26 November 2018.
PARAMNet-3, a high performance clusters interconnect developed indigenously by CDAC.
- ^ "C-DAC Press Release: Faster PARAM to take on US supercomputer". Retrieved 15 September 2011.